3D IC Integration and Packaging

by: John H. Lau, Ph.D.


Abstract: A comprehensive guide to 3D IC integration and packaging technology. 3D IC Integration and Packaging fully explains the latest microelectronics techniques for increasing chip density and maximizing performance while reducing power consumption. Based on a course developed by its author, this practical guide offers real-world problem-solving methods and teaches the trade-offs inherent in making system-level decisions. Explore key enabling technologies such as TSV, thin-wafer strength measurement and handling, microsolder bumping, redistribution layers, interposers, wafer-to-wafer bonding, chip-to-wafer bonding, 3D IC and MEMS, LED, and complementary metal-oxide semiconductor image sensors integration. Assembly, thermal management, and reliability are covered in complete detail. 3D IC Integration and Packaging covers: • 3D integration for semiconductor IC packaging • Through-silicon vias modeling and testing • Stress sensors for thin-wafer handling and strength measurement • Package substrate technologies • Microbump fabrication, assembly, and reliability • 3D Si integration • 2.5D/3D IC integration • 3D IC integration with passive interposer • Thermal management of 2.5D/3D IC integration • Embedded 3D hybrid integration • 3D LED and IC integration • 3D MEMS and IC integration • 3D CMOS image sensors and IC integration • PoP, chip-to-chip interconnects, and embedded fan-out WLP
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Book Details

Title: 3D IC Integration and Packaging

Publisher: McGraw-Hill Education: New York, Chicago, San Francisco, Athens, London, Madrid, Mexico City, Milan, New Delhi, Singapore, Sydney, Toronto

Copyright / Pub. Date: 2016 McGraw-Hill Education

ISBN: 9780071848060

Authors:

John H. Lau, Ph.D. is both an ASME fellow and an IEEE fellow. He has authored or coauthored 18 engineering books and more than 425 peer-reviewed technical publications, and given more than 290 lectures, workshops, and keynotes worldwide.

Description: A comprehensive guide to 3D IC integration and packaging technology. 3D IC Integration and Packaging fully explains the latest microelectronics techniques for increasing chip density and maximizing performance while reducing power consumption. Based on a course developed by its author, this practical guide offers real-world problem-solving methods and teaches the trade-offs inherent in making system-level decisions. Explore key enabling technologies such as TSV, thin-wafer strength measurement and handling, microsolder bumping, redistribution layers, interposers, wafer-to-wafer bonding, chip-to-wafer bonding, 3D IC and MEMS, LED, and complementary metal-oxide semiconductor image sensors integration. Assembly, thermal management, and reliability are covered in complete detail. 3D IC Integration and Packaging covers: • 3D integration for semiconductor IC packaging • Through-silicon vias modeling and testing • Stress sensors for thin-wafer handling and strength measurement • Package substrate technologies • Microbump fabrication, assembly, and reliability • 3D Si integration • 2.5D/3D IC integration • 3D IC integration with passive interposer • Thermal management of 2.5D/3D IC integration • Embedded 3D hybrid integration • 3D LED and IC integration • 3D MEMS and IC integration • 3D CMOS image sensors and IC integration • PoP, chip-to-chip interconnects, and embedded fan-out WLP